1732-3916

Java Based Transistor Level CPU Simulation Speedup Techniques

Wojtowicz

Tomasz

author

Department of Computer Sciences and Computer Methods, Pedagogical University

Correspondence to: Tomasz Wojtowicz tomaswoj@gmail.com

11 04 2016

Volume 24 2015 179 195

2016

<p style="text-align: left;">Transistor level simulation of the CPU, while very accurate, brings also the performance challenge. MOS6502 CPU simulation algorithm is analysed with several optimisation techniques proposed. Application of these techniques improved the transistor level simulation speed by a factor of 3–4, bringing it to the levels on par with fastest RTL-level simulations so far.</p>

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