%0 Journal Article
%T Functional decomposition of combinational logic circuits with PKmin
%A Michalski, Tomasz
%A Kokosiński, Zbigniew
%J Czasopismo Techniczne
%V 2016
%R 10.4467/2353737XCT.16.257.6056
%N Elektrotechnika Zeszyt 2-E 2016
%P 191-202
%K combinatorial logic circuit, FPGA, functional decomposition, LUT, PKmin
%@ 0011-4561
%D 2016
%U https://ejournals.eu/czasopismo/czasopismo-techniczne/artykul/functional-decomposition-of-combinational-logic-circuits-with-pkmin
%X 
	In this paper, an application of the PKmin program for functional decomposition of multi- input multi-output combinational circuits is presented. The main focus is on balanced multi- level decomposition of logic circuits into minimal number of blocks, such as LUTs in FPGAs. Reduction of the input redundancy is available. Decomposition schemes include parallel, joint/ disjoint serial and a mixed one. The decomposition with PKmin can be automated by means of a heuristic algorithm or can be supervised by the designer. A distinctive feature of PKmin is the visualization of the design steps and the final layout of blocks and their interconnections. PKmin is compared in an example with the program DEMAIN.